1. Field of the Invention
This invention relates generally to a communications system and, more particularly, to an uplink demodulator scheme for a processing satellite employed in a satellite based cellular communications system.
2. Discussion of the Related Art
In a satellite based cellular communications system, a central terrestrial control processor or a network control center (NCC) generally controls one or more processing satellites operating within the communications system. Each processing satellite within the communications system services multiple users located in multiple geographic areas, known as ground cells. The processing satellites receive and transmit data signals to and from the multiple users or terrestrial terminals positioned at different locations within the ground cells on a point-to-point manner, via uplinks and downlinks.
Transmission access to the uplinks in each ground cell is typically divided into sub-bands using frequency division multiple access (FDMA). Within each sub-band, the sub-band may again be divided by frequency into multiple channels using FDMA. Transmission access is also divided by time using time division multiple access (TDMA) into slots occupied by a transmission burst. The transmission bursts utilize phase shift keying, usually either binary phase shift keying (BPSK) or quadrature phase shift keying (QPSK) for the modulation format. Typically these transmission bursts have a header that facilitates forming an initial estimate of the carrier phase, and a body which carries the data information which is usually encoded by means of an error control code.
The essential functions of a processing satellite are to separate the various uplink channels by frequency, recover estimates of the modulated data from the burst body, and pass these estimates to error control processing to perform the decoding. In some cases, the data content of the burst takes the form of ATM cells, in which case, it is also necessary to recover the cells from the decoded data and perform integrity checks upon them. These essential functions are performed in three major subsystems in a processing satellite. A channelizer partitions the spectrum of the beam into sub-bands and performs related functions. A demodulator and decoder, which is the subject of the present invention, demodulates and decodes the information provided by the channelizer. Block and cell level processing takes the output from the demodulator and decoder and performs outer decoding and cell level functions.
Each uplink demodulator and decoder is generally required to serve the total bandwidth of a sub-band (typically 17 MHz), of which there are typically seven (7) sub-bands, in each beam of the processing satellite coverage area. Transmission within each sub-band may be configured in one of three modes and the demodulator and decoder must be able to serve each such mode. These modes include type X where the demodulator and decoder handles one single high speed channel at a time, with each channel occupying the full bandwidth of the sub-band. Type Y where the demodulator and decoder handles typically five (5) medium size channels sharing the bandwidth by FDMA. Type Z where the demodulator and decoder concurrently receives signals from typically twenty five (25) narrow band low speed channels sharing the bandwidth again by FDMA. In each of the modes, the data transmission may have a xe2x80x9cheavyxe2x80x9d or a xe2x80x9clightxe2x80x9d encoding. In both the heavy and light encoding, an outer error control code is applied, typically a Reed-Solomon code over GF (256) of size (236, 212). In the heavy mode, an inner error control code is also applied. This inner error control code is typically a short rate one-half block code, such as the (8, 4) biorthogonal code. Accordingly, there are six modes which the demodulator and decoder must support which are XH, XL, YH, YL, ZH, ZL.
In each of these encoded modes, the uplink transmission is organized time wise in frames typically of 93 milliseconds, where each frame has two portions. The first portion is the sync burst portion and the second portion is the traffic or data burst portion, typically occupying 3 and 90 milliseconds, respectively. The demodulator and decoder is not required to process the sync burst portion and is only required to process the traffic or data burst portion. The traffic burst portion consists of a number of slots, within which individual traffic bursts may be placed by an uplinking earth terminal. Typically, the number of slots in the ZH mode is 24 and in the ZL mode is 48. In the YH and YL modes, there are typically five times as many slots per frame and in the XH and XL modes, there are typically twenty five time as many slots per frame. The signaling rate is typically 14, 2.8 and 0.56 megasymbols per second in the X, Y and Z channels, respectively. For each channel type the same symbol rate applies for both the heavy code and the light code modes.
The demodulator and decoder must also be capable of examining all the signals present in each burst slot and demodulate and decode it regardless of whether it contains a valid burst. The demodulator and decoder must also function reliably without knowing the phase of the uplink signal. However, the demodulator and decoder may rely on the signal amplitude being substantially controlled as a result of uplink power control methods and may rely upon the incoming frequencies of both the signal carrier and of the symbol epoch clock being very close to its own. The demodulator and decoder may also rely on time alignment of the bursts being very precise so that the demodulator and decoder does not need to provide burst delineation or symbol time recovery functions.
Since ATM protocol requires that cells be delivered in the same order that they are presented and since usage may involve inverse multiplexing where more than one channel is used to transmit a cell frame, the demodulator and decoder must also insure that all bursts are processed in a particular order when channelization is used (i.e., modes Y and Z) and that the burst time order is preserved when heavy and light coding modes are mixed in a given channel mode. In this regard, it should be noted that when in the X mode, only a single channel is present and all bursts are either heavy or light encoded. Conversely, in channels Y and Z, each channel within these modes may be heavy or light encoded.
What is needed then is a demodulator and decoder for a processing satellite in a satellite based cellular communications system that meets the above requirements. This will, in turn, provide a demodulator and decoder for a processing satellite that performs the demodulation process independent of synchronization, eliminates the need for a symbol time recovery based on the reliance on precise synchronization, eliminates the need for burst detection, incorporates phase-lock loop technology, accommodates three channelization modes, accommodates two coding modes, permits mixed coding modes in multichannel modes (Y and Z), and is switchable among multiple operating modes with different channelizations. It is, therefore, an object of the present invention to provide such a demodulator and decoder for a processing satellite operating in a satellite based cellular communications system.
In accordance with the teachings of the present invention, an uplink demodulator system for use in a processing satellite in a satellite based communications system is provided. The uplink demodulator system is operable to operate among multiple operating modes having different channelizations and different coding strengths. The uplink demodulator system also receives channelized data that is time aligned with the corresponding uplinks based upon a synchronization system.
In one preferred embodiment, an uplink demodulator system for use in a processing satellite in a satellite based communications system includes a first multiplexer, a multichannel preamble processor, a multichannel phase tracker, first and second output paths and a second multiplexer. The first multiplexer is operable to receive channelized data from a plurality of channelization modes and operable to route this channelized data to the multiplexers output. The multichannel preamble processor is in communication with the first multiplexer and operable to determine a phase estimate for each channel of said channelized data. The multichannel phase tracker is in communication with the first multiplexer and operable to receive the phase estimates from the multichannel preamble processor and further operable to track a phase for each channel of the channelized data to phase align each channel of the channelized data to corresponding uplink signals. The first output path is in communication with the multichannel phase tracker and operable to operate on heavy encoded channelized data. The second output path is in communication with the multichannel phase tracker and operable to operate on light encoded channelized data. The second multiplexer is operable to multiplex and route the heavy encoded channelized data from the first output path and the light encoded channelized data from the second output path to a second output where this multiplexed data is phase aligned with the corresponding uplink signals.
Use of the present invention provides an uplink demodulator system for use in a processing satellite in a satellite based cellular communications system. As a result, the aforementioned requirements associated with demodulating and decoding channelized data in a processing satellite have been met.